In very large scale integrated circuits (VLSIC), electrical contact between aluminum interconnections and monocrystalline or polycrystalline regions below the aluminum is typically established by etching contact windows in a dielectric material such as silicon dioxide. A blanket film of aluminum, which may be doped with small amounts of copper and/or silicon, is deposited on a top surface of the dielectric and in the contact windows by some form of physical vapor deposition such as RF sputtering or evaporation. The aluminum is then patterned by photolithographic and subtractive etching techniques.
As packing densities of integrated circuit devices increase, the size of electrical contact windows must be decreased. However, it is usually not possible to proportionally scale down the thickness of the dielectric. As the ratio of the sidewall area of a contact and the top surface area of the contact increases, the step coverage of physically deposited metal, such as aluminum, is degraded. As a result, the current handling capacity of aluminum in the contact is reduced which compromises its reliability and integrity.
A common technique to improve the fill of small, deep contacts is to deposit an electrically conductive film by chemical vapor deposition. Several materials such as tungsten, molybdenum, and aluminum have been suggested for this purpose. However, the best established material is polycrystalline silicon or polysilicon. Polysilicon is easily deposited highly conformal and adheres well to most other materials. Polysilicon is also easily etched into fine-line patterns.
There are two noteable disadvantages of polysilicon as an interconnection for VLSIC. Polysilicon is not electrically conductive and must be doped with n-type (e.g. arsenic, phosphorus, antimony) or p-type (e.g. boron, aluminum, indium) materials to become electrically conductive. Even when heavily doped, polysilicon still must be layered with a more conductive materials such as aluminum to be a satisfactory interconnection. However, the combination of a polysilicon layer and an aluminum layer results in interconnection which is far too thick to pattern and etch properly into fine-line patterns. Therefore, it is necessary to thin down the polysilicon prior to aluminum deposition by the use of a blanket etchback.
Other problems also exist in the fabrication of polysilicon-filled contacts described above. Unless additional masking layers are used to selectively dope the polysilicon both n- and p-type, low resistance contacts to both n- and p-type silicon devices may not be formed. Widmann et al. in U.S. Pat. No. 4,562,640 entitled "Method Of Manufacturing Stable, Low Resistance Contacts in Integrated Semiconductor Circuits" suggests forming a metallic film such as a metal silicide layer between a substrate or diffusion and a polysilicon-filled contact. However, good electrical contact between the polysilicon and metal silicide is is not guaranteed. Upon insertion into a conventional polysilicon hot-wall reactor at temperatures at or above five hundred eighty degrees Centigrade, most metal silicide and pure metal layers will form a nonconductive native oxide which can ruin the electrical contact to the polysilicon layer. A more appropriate metal layer of titanium nitride, TiN, is suggested by Moghadam et al. in an article entitled "Polysilicon-Filled Contact Planarization" presented at the 1988 Proceedings Fifth International IEEE VLSI Multilevel Interconnection Conference, pages 345-352, June 13, 1988. Another problem associated with polysilicon-filled contacts involves the etchback of the polysilicon layer. If the polysilicon is etched completely so that the dielectric is exposed during the etch, the sudden excess of reactive etchant species will greatly accelerate the etch rate of the polysilicon remaining in the contact windows, thereby gouging the filled contacts.